Time Borrowing (Cycle Stealing) in VLSI: Latch Timing with Examples
Learn time borrowing (cycle stealing) in VLSI: how latches borrow time, the maximum time borrow formula, a worked example, latch hold checks and interview questions.
Category Physical Design
Static Timing Analysis (STA) in VLSI: Setup, Hold, OCV/AOCV/POCV, CRPR
Learn static timing analysis (STA) in VLSI: timing paths, setup and hold checks, slack, OCV vs AOCV vs POCV, CRPR with a worked example, timing corners and interview questions.
Clock Tree Synthesis (CTS)
What is a Clock? A clock signal is like the heartbeat of a digital system. It pulses at regular intervals, switching between high and low states with steady rise and fall transitions. In an ideal case, the clock has a…
VIAs in VLSI
What are VIAs in VLSI? Types of VIAs Single Cut Via Single cut via is a type of via where we have only one poly connection between the two connecting metal layers. Below picture will explain better. Multi Cut Via…
Pitch, Spacing & Offset
Pitch The distance between the center to center of the metal is called as pitch. In the below picture, B is pitch. Spacing Spacing is the distance between the edge to edge metal layers. The distance A is spacing in…
Metal Layers
What are Metal Layers? In the above figure, we can see that two points need to get connected through the different metal layers which is horizontal and vertical.
Routing
Overview of Routing Types of Routes Clock physical routing is completed during CTS after clock buffer insertion. Pre-Route Checks The pre-route checks that need to be done are as follows: Goals of Routing
Signal Integrity and Crosstalk
What is Signal Integrity and Crosstalk? Let’s take one example. I am doing work from home in my study room attending meeting and my family is sitting in the TV room and watching some news. Even though I am sitting…
Integrated Clock Gating (ICG) Cell & Related Concepts
Integrated Clock Gating (ICG) Cell & Related Concepts We always have target to close the design by meeting the PPA (Power, Performance, Area). Clock consumes most of the power as it has high switching activities. Being specific, clock consumes almost…
Duty Cycle & Pulse Width
Why clock duty cycle distorts through the clock tree, how STA computes minimum pulse width slack (worked example), how to read the report, and a step-by-step fix method, with interview questions.