Power
Power We will discuss more about power analysis in ECO section while working on PDN, for now let’s take basic glimpse of the power analysis and consumption. There are basically 2 types of power consumption in VLSI design: 1. Dynamic…
Category Floorplan
Pin Placement & Power Mux Placement
Pin Placement Power Mux placement
Power Ground Grid Insertion
Power Ground Grid Insertion
Power Switch Cell Placement in VLSI
Power Switch Cell Placement Drawbacks In the above figure we can see that power switch cells are placed in array pattern in rows.
Tap Cell Placement in VLSI
Tap Cell Placement: Latch-up condition: Latch-up basically means a short circuit condition between power and ground. Due to this short circuit condition, a low impedance path is created. So in order to limit this resistance between power and ground connections…
Boundary Cap Cells/End Cap Placement
What is Boundary Cap (End Cap) ? In the above picture, we can see that all the boundary cap cells are sitting at the periphery of the design and within the area bounded by the boundary cap, we place Standard…
Level Shifter Cell
Level Shifter Cell:
Retention Flops
Retention Flops:
Isolation Cell Placement
Isolation cell placement Type of Isolation Cells Verify DRC We verify DRC after the Isolation cell placement to look for PG rail connectivity, Geometry checks, Metal short, etc. We must fix these DRCs before going…
TIE Cells in VLSI
What are TIE Cells? Types of TIE Cells There are two types of TIE Cells: – Tie High One pin to VDD and other to signal nets – Tie Low One pin to VSS and other to…