Metal Layers
What are Metal Layers? In the above figure, we can see that two points need to get connected through the different metal layers which is horizontal and vertical.
Admin
Routing
Overview of Routing Types of Routes Clock physical routing is completed during CTS after clock buffer insertion. Pre-Route Checks The pre-route checks that need to be done are as follows: Goals of Routing
Signal Integrity and Crosstalk
What is Signal Integrity and Crosstalk? Let’s take one example. I am doing work from home in my study room attending meeting and my family is sitting in the TV room and watching some news. Even though I am sitting…
Integrated Clock Gating (ICG) Cell & Related Concepts
Integrated Clock Gating (ICG) Cell & Related Concepts We always have target to close the design by meeting the PPA (Power, Performance, Area). Clock consumes most of the power as it has high switching activities. Being specific, clock consumes almost…
Duty Cycle & Pulse Width
Why clock duty cycle distorts through the clock tree, how STA computes minimum pulse width slack (worked example), how to read the report, and a step-by-step fix method, with interview questions.
Useful Skew
Useful skew is very important concept in CTS. Let’s discuss this through an example. In the above picture, we can see that the first path is having positive 15 ps of skew, second path is having negative 5 ps of…
CTS Spec File
CTS Spec File CTS spec file contains the below information: 1. Inverters or buffers to be defined which will be used to balance the clock tree. 2. CTS Exceptions (End points of clock tree). 3. Skew group information. 4. Contains…
Power
Power We will discuss more about power analysis in ECO section while working on PDN, for now let’s take basic glimpse of the power analysis and consumption. There are basically 2 types of power consumption in VLSI design: 1. Dynamic…
Performance (Timing)
Understanding the Performance (Timing) Before going to understand the performance (timing), lets understand how timing is getting checked. At placement stage we have the placement of cells information, but we don’t have connection information in between the cells so how…
Placement Optimization
What is Placement Optimization? Depending on the stages of the design, optimization can include the following operations: Secondary PG Routing As we know there are many partitions now a days, so we are dealing with UPF and number of power…